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[VHDL-FPGA-Verilog] MICO8_DEMO_03_18_08.ZIP

Description: Lattice 超精简8位软核CPU--Mico8，开放所有源代码，包括VHDL，编译器，支持GCC编译器。可在Lattice所有FPGA和MachXO 器件上使用。本例包含示例和说明文档。对使用Lattice器件的用户或者学习CPU设计的人员有较高参考价值。-Lattice super-streamlined eight soft-core CPU- Mico8, open up all the source code, including VHDL, the compiler to support the GCC compiler. Lattice can all FPGA and MachXO devices use. In this case contains examples and documentation. On the use of Lattice devices users or learning CPU design personnel have a higher reference value.
Platform: | Size: 3317760 | Author: ymjcloud | Hits:

[Windows Develop] class34

Description: eda中的8位的CPU设计，电子类专业非常实用！-EDA in eight of the CPU design, electronics professional very useful!
Platform: | Size: 443392 | Author: 王子 | Hits:

[ARM-PowerPC-ColdFire-MIPS] jamcpu

Description: jam CPU模拟器的设计与实现.其中包含设计文档-jam CPU Simulator Design and Implementation. which includes design documents
Platform: | Size: 104448 | Author: 刘海洋 | Hits:

[VHDL-FPGA-Verilog] 32bit_RISC_CPU

Description: 32 risc cpu的参考设计，内涵完整的testbench-32 risc cpu s reference design, the connotation of complete Testbench
Platform: | Size: 2444288 | Author: zys | Hits:

[VHDL-FPGA-Verilog] freerisc8_11

Description: 一个基于VHDL 的简单8位CPU的IP core核心代码-VHDL based on a simple 8-bit CPU core code of the IP core
Platform: | Size: 275456 | Author: wfs | Hits:

[OS program] 8086IP

Description: 开源CPU软核8086的源码,波兰版Verilog源码-8086 soft-core CPU revenue source, the Polish version of Verilog source code
Platform: | Size: 71680 | Author: 林丹 | Hits:

[VHDL-FPGA-Verilog] OR1200_verilog

Description: or1200开源risc cpu的verilog描述实现，cpu源代码分析与芯片设计一书的源码-or1200 open source Verilog description of the risc cpu realize, cpu source code analysis and chip design source book
Platform: | Size: 204800 | Author: yu | Hits:

[VHDL-FPGA-Verilog] mcpu_1.06b

Description: MCPU is a minimal cpu aimed to fit into a 32 Macrocell CPLD - one of the smallest available programmable logic devices. While this CPU is not powerful enough for real world applications it has proven itself as a valuable educational tool. The source code is just a single page and easily understood. Both VHDL and Verilog versions are supplied. The package comes with assembler, emulator and extensive documentation.-MCPU is a minimal cpu aimed to fit into a 32 Macrocell CPLD- one of the smallest available programmable logic devices. While this CPU is not powerful enough for real world applications it has proven itself as a valuable educational tool. The source code is just a single page and easily understood. Both VHDL and Verilog versions are supplied. The package comes with assembler, emulator and extensive documentation.
Platform: | Size: 248832 | Author: eldis | Hits:

[Windows Develop] RISC_8

Description: 经过验证的8位RISC-CPU源代码，verilog代码，附：汇编测试源代码，而且测试通过。-Verified 8 RISC-CPU source code, verilog code, attached: the compilation of the test source code, and test.
Platform: | Size: 173056 | Author: WangYong | Hits:

[Embeded-SCM Develop] IP_CORES

Description: IC内核的设计源码！其中包含MP3内核，CPU内核，I2C内核等多达式种IC设计的源码！-IC design of the kernel source code! MP3 contains one of the kernel, CPU core, I2C kernel up-type species such as IC design source!
Platform: | Size: 27160576 | Author: hehuilong | Hits:

[VHDL-FPGA-Verilog] 8080cpu

Description: this code for cpu 8080 design -this is code for cpu 8080 design
Platform: | Size: 9216 | Author: minh | Hits:

[Windows Develop] CPU

Description: RC4 Encrpytion 1.Encrpyt strings 2.Create pairs of keys for encoding and decoding automatically 3.Present the crptograph 4.Decode the crptograph to get the plaintext -This CPU has basic instruction set, and we utilize its instruction set to generate a program to verify its performance. Four parts constitute a simple CPU: the control unit, the internal registers, the ALU and instruction set.
Platform: | Size: 34816 | Author: Jane | Hits:

[VHDL-FPGA-Verilog] Microprocessor

Description: 精通verilog HDL语言编程的一个不错的cpu 代码-Verilog HDL language proficiency of a good cpu code
Platform: | Size: 774144 | Author: 孟霑 | Hits:

[VHDL-FPGA-Verilog] cpu

Description: 16位元浮点数CPU,可作运算,以VHDL编写-16-bit floating point CPU, can be used for computing in order to prepare VHDL
Platform: | Size: 2048 | Author: 朋友 | Hits:

[Linux-Unix] first_cpu

Description: nios ii cpu核，包含通用IO口、sdram、flash、uart-nios ii cpu、genernal io port、sdram、falsh、uart
Platform: | Size: 13319168 | Author: 陆yong | Hits:

[VHDL-FPGA-Verilog] _8bitcpu

Description: 8 bit cpu vhdl design code not tested
Platform: | Size: 86016 | Author: zahir Parkar | Hits:

[Software Engineering] cpudesignvhd

Description: 内包含在VHDL环境下的CPU设计原理图和代码以及最后的仿真过程-Within the VHDL environment is included in the CPU design schematics and code, as well as the final simulation
Platform: | Size: 77824 | Author: 张三 | Hits:

[VHDL-FPGA-Verilog] CPU

Description: 本人主要是介绍CPU和运算器级联的程序，采用的是VHDL语言-I was to introduce the CPU and the main computing device cascade process, using the VHDL language
Platform: | Size: 1024 | Author: 夜之灵 | Hits:

[VHDL-FPGA-Verilog] CPUVHDL

Description: CPU+VHDL代码及详细注释\一个老外写的 200多行代码-CPU+ VHDL code and detailed notes \ a foreigner wrote more than 200 lines of code
Platform: | Size: 32768 | Author: 阿德陈 | Hits:

[Other] cpu

Description:
Platform: | Size: 1656832 | Author: recome | Hits:
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